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STM32 as I2C Slave || PART 7 || Clock Stretching || General call || Dual Address
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Jul 22, 2023
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View Video Transcript
0:00
foreign
0:09
Tech
0:12
this is the seventh and the last video
0:14
for now in the
0:16
stm32i2c slave series
0:19
today we will just look into some
0:21
details we ignored throughout this
0:23
series
0:24
we will take a look at the error
0:26
handling and some configuration settings
0:28
like clock stretching General address
0:31
and the Dual address mode
0:34
here I have the reference Manual of the
0:37
f103c8 controller
0:39
under the i2c you can see a subheading
0:42
called error conditions
0:45
it describes the types of errors that
0:47
might occur during the transmission and
0:49
how to handle them
0:51
the bus error occurs when the interface
0:53
detects a start or stop condition while
0:56
the transfer is taking place
0:59
in case of the slave mode a misplaced
1:01
start is generally treated as a start
1:04
condition sent by the master and in this
1:06
case the slave waits for the address or
1:09
the stock to be sent by the master
1:11
similarly a misplaced stop is treated as
1:14
a stock condition and the slave stops
1:17
the transfer and releases the lines
1:20
we saw how acknowledgment failure error
1:23
gets triggered when the master sends a
1:24
knack response
1:26
the slave releases the lines when the
1:28
acknowledgment failure error is
1:30
generated
1:32
there are other errors like arbitration
1:34
loss error and the overrun or under run
1:37
error
1:38
you can read about them in the reference
1:40
Manual of your controller
1:42
the point is Paul already handles these
1:45
errors in the error Handler function
1:48
you can see the error Handler function
1:50
in the interrupt file
1:52
here you can see to handle the bus error
1:56
it clears the error flag first and then
1:58
performs the software reset
2:01
similarly it handles other errors too
2:04
and finally the error callback is called
2:07
in the end
2:08
here we can perform the further
2:10
processing based on what error we got
2:13
as we already did in the previous videos
2:16
where based on the acknowledgment
2:18
failure error we performed different
2:20
operations
2:22
we don't need to clear the flash here as
2:24
it has been already cleared before the
2:26
Callback was called
2:28
anyway I did some intense testing and I
2:31
did not get any other errors for now
2:33
before uploading the final code I will
2:36
do some more tests and if I do get more
2:39
errors I will update this particular
2:41
code to handle them
2:43
I will comment on the code so that you
2:46
can understand what exactly I did
2:48
so make sure you download the code
2:52
we don't need to make any change in the
2:54
i2c slave file today
2:57
let's see the ioc file
3:00
while setting up the i2c we skipped some
3:03
configurations like the clock stretching
3:05
the Dual address and the general call
3:08
address
3:09
let's start with the clock stretching
3:12
first
3:13
you can find more details about the i2c
3:16
terminologies on the website i2cbus.org
3:20
here is the clock stretching feature
3:23
clock stretching basically enables the
3:26
slave device to stretch the clock during
3:28
the data transfer
3:30
we know that the i2c is a synchronous
3:32
communication so both the master and
3:35
slave should be doing the same thing at
3:37
the same time
3:38
for example if the slave is sending the
3:41
fourth bit of the data then the master
3:43
should also be looking for the fourth
3:45
bit of the data
3:47
there are some situations when the slave
3:49
device cannot keep up with the master
3:52
the device might be a little slow or
3:54
there might be some high priority
3:56
interrupt it has to serve
3:58
in these situations clock stretching
4:01
allows the slave device to hold the
4:03
clock pin low for some additional time
4:06
the master just waits for the clock pin
4:08
to go high before it samples the data
4:11
clock stretching has its benefits but if
4:14
the bus is shared by multiple devices
4:16
the slower device can affect the
4:18
performance of the system by reducing
4:20
the bus speed
4:22
so this feature must be used carefully
4:24
when dealing with multiple devices on
4:27
the same bus
4:28
I don't have means to demonstrate
4:30
exactly how this works so I hope you
4:33
understood the theory of it
4:35
in the configuration the clock now
4:38
stretch is disabled that means the clock
4:40
stretching is enabled
4:42
next we will talk about General call
4:45
detection
4:46
all i2c devices have a general address
4:49
which is zero
4:51
this address can be used by the master
4:53
to communicate with all the slave
4:55
devices on the bus
4:57
it's up to the slave device whether to
5:00
acknowledge this address or not
5:02
we will see this in a while
5:05
the Dual address feature enables the SDM
5:08
32 to have two different addresses
5:11
the device can respond to two different
5:13
sets of addresses each working
5:15
independently
5:17
here we have the option to input the
5:20
second address for the slave
5:22
we will enable this in the code itself
5:25
let's generate the project
5:28
I haven't modified anything yet the
5:31
project is the same as it was before
5:34
we will enable the feature one by one
5:37
the i2c address is 36 which is nothing
5:40
but the 12 hexa shifted by 1 to the left
5:44
the hull uses the 8-Bit address so the
5:47
7-bit address we input in the cube MX
5:49
gets modified with the right bit in the
5:51
least significant position
5:54
note that the general call is disabled
5:56
so the device should not respond to the
5:59
address 0.
6:01
let's build and debug this
6:09
this is the command used for the address
6:11
and right now I am using the address 12
6:14
hex
6:15
let's try to write some data into the
6:18
i2c registers
6:23
all right the data is written
6:25
successfully
6:28
now I'm changing the slave address to
6:31
zero
6:38
now you can see the master is not able
6:40
to write any data
6:42
it had received the Knack response from
6:45
the slave indicating that the slave is
6:47
not acknowledging the address or data
6:49
sent by the master
6:51
well the reason is clear since the
6:54
address of the device is 12 hex it will
6:56
not respond to the address 0. this is
6:59
where the general call mode comes in
7:02
if we enable it the slave will respond
7:05
to the general call by the master that
7:07
is called to the address 0. Let's test
7:10
it again
7:12
I am setting the address 0 for the slave
7:15
and now the slave has accepted the data
7:18
sent by the master
7:20
remember that the general call is only
7:22
used by the master to send something it
7:25
cannot use it to read from the slave
7:28
if it tries to read using the address 0
7:30
it will obviously receive the Knack
7:32
response
7:36
one more thing I want to point out here
7:39
the address callback function has a
7:41
parameter called the address match code
7:44
this variable stores the address of the
7:47
slave for which this callback is called
7:50
even though the master is transmitting
7:52
for the address 0 this variable still
7:55
shows the value 36 which is the primary
7:58
slave address for the device
8:00
I don't know if this is intentional or
8:02
if this is an error in the hole but it
8:05
should hold the address which was
8:06
responsible for this call
8:08
the address match code basically can be
8:11
used to perform different operations
8:13
based on which address called the
8:15
function
8:16
anyway I will leave a comment and update
8:19
the website article if I find any update
8:21
on this
8:23
now we will see the Dual address
8:26
let's enable it
8:28
we have to set the second slave address
8:30
but here it should be in the 8-Bit
8:32
format
8:34
here the 7-bit address is 45 hex and
8:37
shifting it to the left by 1 converts it
8:39
to the 8-Bit format with the least
8:41
significant bit of zero
8:44
the slave now has the two addresses and
8:47
we will see how it responds to both the
8:49
addresses
8:51
let's set the slave address to 45 hex
8:58
the master writes the data and the slave
9:01
stores it in the respective registers
9:04
so the slave is responding to the
9:07
address 45 hex
9:09
the master can also read data from the
9:12
slave's memory location
9:14
now let's change the slave address to 12
9:17
hex
9:21
we will write the data again
9:29
the data is received in the RX buffer
9:31
but hasn't been stored in the registers
9:34
let me reset the debugger and try again
9:38
all right the data has been updated in
9:40
the registers
9:42
so the slave is responding to the
9:44
address 12 hex as well as the address 45
9:47
hex
9:48
let's put a breakpoint inside the
9:50
address callback function
9:52
I am still using the address 12 hex for
9:55
the slave and now write some data into
9:58
it
9:59
here the address match code shows the
10:01
value 36 which is the same address
10:04
Master used
10:06
now let's send the data using the slave
10:08
address 45 hex
10:12
the address match code is 138 this time
10:16
which is the 8-Bit equivalent for the
10:18
address 45 hex
10:20
so the address match code stores the
10:23
slave address for which the address
10:25
callback was called
10:27
we can use this variable to execute
10:29
different sets of functions for
10:31
different addresses
10:33
we can create some Global variable and
10:36
store the address match code into it
10:39
then check the slave address before
10:41
performing any operation
10:43
basically we can separate the tasks to
10:45
be performed for each address
10:48
so this is all that I wanted to cover in
10:50
this video
10:51
we saw the clock stretching the general
10:54
call and the Dual addressing in the
10:56
sdm-32i2c
10:59
this is it for this video
11:01
I will update the code and the article
11:04
for the error handling if I find any
11:06
more errors while testing
11:08
the link to download the code is in the
11:10
description below
11:12
keep watching and have a nice day ahead
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