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SDRAM in STM32 || MT48LC4
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Oct 20, 2021
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View Video Transcript
0:01
[Music]
0:09
hello everyone
0:11
welcome to controllers tech
0:14
few days ago i made a video on the qsbi
0:17
peripheral where we interfaced the
0:19
external flash and using the memory map
0:22
mode the memory was seen as the internal
0:24
memory
0:26
similarly today we will interface the
0:28
external ram with the help of the fmc
0:31
peripheral
0:32
in today's video we will just do the
0:35
connection part for the external sdram
0:38
we will also use mem copy functions
0:41
which will prove that the ram is being
0:43
treated as the internal ram
0:46
later in the next video i will show a
0:48
very important use of it where we will
0:50
use this sdram to store the lcd frame
0:53
buffer into it
0:55
so let's start the today's video
0:59
during the research i have found out
1:01
that basically all the stm32
1:03
microcontrollers which come preloaded
1:05
with the sdram use this
1:08
mt48l from the micron
1:11
so this tutorial will be focused on this
1:13
sdram only
1:16
you can see the schematic of the board i
1:18
am using and it have the same memory
1:25
let's start the cube id and set up our
1:28
project
1:33
i am using
1:35
stm32f750 discovery board
1:39
give some name to this project and click
1:41
finish
1:49
first things first let's set up the
1:52
clock
1:53
i am using external crystal for the
1:55
clock
2:00
i am running the system at maximum
2:03
possible
2:04
216 megahertz clock
2:17
if you are using cortex m7 enable the
2:20
cache
2:25
let's take a look at the data sheet for
2:27
the sdram
2:29
here you can see there are three
2:31
variants available and these are their
2:34
respective speeds
2:36
i have the variance 6 ay and this one
2:39
runs at 167 megahertz clock
2:43
this is why i have configured the clock
2:45
to the maximum so that we achieve this
2:47
speed
2:52
this is the connection for the sdram and
2:55
you can see it uses the fmc peripheral
2:59
we will need this connection diagram
3:01
during the setup
3:07
let's see sdram peripheral
3:17
here you can see we have sdram 1 and sd
3:20
ram 2.
3:22
this depends on what bank is being used
3:25
for the sdram in the controller
3:28
for this particular board the bank 1 is
3:30
being used for the sdram so i am
3:33
configuring the sdram 1.
3:36
let's enable the clock and the chip
3:39
you can see here i don't have option to
3:41
select the another one and this is
3:43
because the sdram is connected to the
3:46
bank 1.
3:49
if you check the reference manual the
3:51
sdram controller here you can see the
3:54
option 0 is for enabling the clock and
3:57
chip for the sdram bank 1.
4:16
in the internal bank number we will use
4:19
the four banks
4:23
this sdram have four banks of 32
4:26
megabits each and we will use all of
4:28
them
4:33
the address will be 12 bits and the data
4:36
will be 16 bits
4:39
this part you can confirm in the
4:41
schematics
4:43
here we have the 16 data pins and here
4:46
are the 12 address pins
4:49
next are the pins
4:52
make sure the pins are correct as i have
4:54
mentioned this cube mx sometimes
4:57
configures the wrong pins
4:59
so do cross check them with the
5:01
schematics
5:03
also the maximum speed should be set to
5:06
very high for all the pins
5:09
now we will configure the parameters
5:15
number of column address bits must be 8.
5:26
you can see it here the column
5:27
addressing is 8 bits from 0 to 7.
5:33
the rest of the setup should be same for
5:35
all the sdrams
5:38
keep the cas latency to three clock
5:40
cycles
5:44
common clock to two cycles
5:46
enable the burst read and leave the
5:49
re-pipe delay to zero cycles
5:57
configure the rest of the options as
5:59
shown
6:00
2 7 4 7 3 2 2.
6:07
this is it for the setup
6:09
click save to generate the project
6:15
now the first thing we will do is copy
6:17
these sdram library files into the
6:20
project
6:29
include the file we just copied into the
6:31
project
6:34
now go to the fmc initialization
6:36
function and here in the user code
6:38
section we will initialize the sdram
6:41
module separately
6:43
you can get this code from the link in
6:45
the description
6:47
here we need to make few changes
6:50
for example what bank are we
6:52
initializing
6:53
for me it's bank 1 so i am leaving it to
6:57
default
6:58
then the cas latency
7:01
if you remember i have used the latency
7:04
of 3 so i am changing this
7:07
all right now we will test the sdram
7:16
let's start by creating the right and
7:18
read buffers
7:34
let's include the string dot h for the
7:37
mem copy functions
7:40
we also need to define the address for
7:43
the sdram
7:44
this address can vary depending on the
7:47
microcontroller
7:49
we can find it in the reference manual
7:53
let's check the fmc memory distribution
8:03
depending on if we are using the bank 1
8:05
or bank 2 we have the different base
8:08
address for the sdram
8:10
since i am using bank 1 the start
8:12
address will be 0 cross c million
8:16
we will write the main function now
8:21
first we will copy the data into the sd
8:24
ram
8:33
and then we will read the data from this
8:35
sdram
8:40
let's build and debug this
8:48
add the sdram address to the memory
8:51
viewer
8:54
i am putting a break point here in the
8:56
initialization function
8:58
as soon as we step over this function
9:01
the data in the sdram starts showing in
9:04
the memory viewer
9:08
now we will copy the data into the
9:10
memory
9:15
here you see the data gets copied into
9:18
the sdram
9:28
and now if we copy the data from this
9:31
location into our buffer we get the same
9:33
that we copied
9:35
so we were able to use the mem copy
9:37
function to read and write the data to
9:39
the sdram
9:41
this means that the external sdram was
9:44
seen as the internal memory to the
9:46
microcontroller
9:48
in the next video when i will cover the
9:50
ltdc peripheral i will make use of this
9:53
sdram to store the frame buffer for the
9:56
display
9:57
this is it for the video
9:59
you can download the code from the link
10:01
in the description
10:03
leave comments in case of any doubt
10:06
keep watching and have a nice day ahead
10:15
[Music]
10:22
you
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