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STM32 ADC Tutorial #10: Measuring VREFINT and Custom Reference Voltage
Mar 8, 2025
Learn how to measure VREFINT on STM32 and use custom reference voltages for accurate ADC readings. š Download project files & article: STM32 ADC Reference Voltage ā https://controllerstech.com/stm32-adc-10-adc-reference-voltage/ š STM32 ADC Tutorials ā https://controllerstech.com/stm32-hal/adc-tutorials/ š ControllersTech Home ā https://controllerstech.com/ š Subscribe for more STM32 ADC tutorials! š Like & share to help others. š” Share this video for STM32 ADC tips! #STM32 #ADC #VREFINT #EmbeddedSystems #Microcontroller #Electronics #STM32Tutorial ________________________________________________________________________________________ ******* SUPPORT US ******* š Donate: https://paypal.me/controllertech š Join Membership: https://www.youtube.com/channel/UCkdqtSMnhYuMsJkyHOxiPZQ/join š Connect: Facebook: https://www.facebook.com/controllerstech Telegram: https://t.me/controllerstechdiscuss Instagram: https://www.instagram.com/controllerstech/
View Video Transcript
0:01
[Music]
0:09
hello and welcome to controller Tech
0:12
this is the 10th video in the SDM 32 ADC
0:16
series and today we will look into the
0:18
reference voltage this is going to be a
0:21
very confusing video so pay attention to
0:24
every detail I will explain why this
0:27
reference voltage is an important
0:29
parameter in the ADC and how to measure
0:31
this voltage using the internal
0:33
reference voltage of SDM
0:35
32 we will also see the availability of
0:38
the reference voltage pin on different
0:40
SDM 32 Dev boards and even if the pin is
0:44
available how to actually make it useful
0:46
in our
0:47
application I will demonstrate the
0:49
measurements on three different Dev
0:51
boards the nucleo 446 blue pill f103 and
0:56
the h750 based custom board
1:00
let's quickly take a look at the
1:02
different types of voltages we are going
1:04
to see in the
1:05
video at first we have the vdd and
1:10
VSS these are the main Supply
1:13
voltages the vdda is the separate analog
1:17
Supply and it is used to power the
1:19
analog circuits in the
1:21
MCU in almost all the SDM 32 devices the
1:25
vdda is connected to the
1:28
vdd next we we have the vref the
1:31
reference
1:32
voltage this is basically the voltage
1:35
with which the ADC input voltage is
1:37
compared and then the digital value is
1:40
calculated based on the
1:42
comparison for example if the vref is at
1:45
3 Vols an input voltage of 1.5 volts
1:48
will result in the digital value of half
1:51
the max value in the low pin package MCU
1:55
a separate vref pin is not available and
1:58
it is connected to the vdd a
2:00
itself whereas in some high-end MCU the
2:04
vref pin is a separate pin and we can
2:06
use it to provide custom reference
2:08
voltage for our
2:10
ADC there is another reference voltage
2:13
vref int this is the fixed internal
2:17
reference voltage which can be used to
2:19
measure external reference
2:21
voltage the Vint has a fixed value and
2:24
it does not vary if even the main Supply
2:27
voltage is
2:28
reduced before we proceed with the video
2:31
just make sure you have the reference
2:33
manual data sheet and the schematic of
2:36
your
2:36
board I will start with the nucleo F 446
2:41
first let's open all the required
2:44
documents for this Dev
2:45
board we will start with the reference
2:48
manual
2:49
first go to the ABC section and here you
2:53
will find a table named ADC
2:56
pins as I mentioned earlier the vref is
2:59
the external reference voltage used for
3:02
comparing the ADC input
3:04
voltage the ADC input voltage cannot be
3:07
outside the VF limits or else the data
3:10
will be limited to these voltages
3:13
itself the vdda and
3:16
vssa are the separate analog Supply
3:19
voltages as discussed
3:21
earlier now we know that the vref plus
3:23
is a separate reference voltage for the
3:25
ADC but it has some limits and you can
3:28
find these limits fits in the data sheet
3:30
or reference Manual of your
3:33
controller here for f44 6re the vref
3:37
plus can be between 1.8 volts to
3:41
vdda whereas the vref minus is connected
3:44
to the vssa which is then connected to
3:47
the ground of the MCU even the reference
3:50
manual says that vref plus and minus
3:52
pins are available in the MCU that does
3:55
not mean that your board will have it
3:57
let's open the data sheet to inv
3:59
investigate it more here search for the
4:02
vref plus and let's keep going until we
4:05
find something useful here you can see
4:08
for the 64 pins package the vdda and
4:12
vref plus are assigned the same pin so
4:15
basically these signals are
4:17
interconnected and hence we cannot
4:19
provide a separate voltage to vref plus
4:22
similarly the RF minus and vsss a are
4:26
interconnected and we already know that
4:28
vssa is connected connected to ground
4:30
hence the vref minus is grounded too on
4:34
a 100 pin package we do have a separate
4:37
vref plus pin but the vref minus is
4:39
still connected to
4:42
vssa having a separate pin simply does
4:44
not mean that we can provide separate
4:46
voltage to vref plus but now we need to
4:49
check the schematic to figure out how
4:51
this pin is
4:52
connected by default in every board I
4:54
have seen so far the vref plus is always
4:57
connected to the VCC but after making
5:00
some Hardware changes we can separate
5:02
this pin we will see this in the
5:05
h750 dev
5:07
board let's keep looking for the vref
5:10
Plus in the data
5:11
sheet here you can see the ADC
5:16
characteristics this table lists all the
5:18
conditions required for the
5:20
ADC the vref plus voltage can vary from
5:24
1.7 volts to
5:26
vdda whereas the vdd can vary from 1.7
5:30
Vol to 3.6
5:32
Vol now let's look for v
5:35
reint as discussed earlier V reint has a
5:39
fixed value therefore this can be used
5:41
to measure the external reference
5:43
voltage or the main Supply voltage
5:46
itself for the F 446 re this internal
5:50
reference voltage is around 1.21
5:53
volts the calibration value for this
5:56
voltage is stored in the memory of the
5:58
MCU during the manufacturing
6:01
process as mentioned here the
6:03
calibration was done for the vdda at 3.3
6:07
volts and the values are stored at these
6:10
addresses I am using nucleo F 446 which
6:14
is a 64 pin package hence the vref pins
6:18
are tied to analog
6:20
supplies also as you can see in the
6:22
schematic here the vdda is connected to
6:26
the vdd the main Supply voltage
6:29
so in the case of nucleo f 446 the
6:33
reference voltage is always the same as
6:35
the supply
6:36
voltage therefore we will use the
6:39
internal reference voltage to measure
6:41
the supply voltage of the nucleo board
6:44
itself imagine a scenario where you want
6:47
to use the ADC on this board but the
6:49
board is battery
6:51
powered as the time passes by the
6:54
battery voltage will drop and so will
6:56
the supply voltage if the ADC is
6:59
configured to always refer to the 3.3
7:02
volts the ADC readings will be wrong
7:05
when Supply voltage drops below
7:08
3.3 therefore it is always recommended
7:10
to measure the current vdd so the ADC
7:13
reference point can be updated
7:16
accordingly as the data sheet shows here
7:18
the minimum sampling time required for
7:21
the Vint is 10
7:23
micros I have already created a project
7:26
for nucleo f
7:28
446 let let's see the configuration used
7:31
in this project the system is running at
7:34
maximum 180 MHz whereas both the APB
7:38
clocks are at 45
7:40
mahz this means that the ADC clock is
7:43
also at 45
7:45
MHz I have enabled the vref in channel
7:48
of the
7:50
adc1 I am using a prescaler of8 to
7:52
reduce the ADC clock and the sampling
7:55
time is set to 480 Cycles with the setup
8:00
the ADC will take around 87 microsc to
8:03
convert the internal reference Channel
8:06
which is more than 10 microc seconds so
8:09
it is fine let's enable one more ADC
8:12
Channel where we will supply the input
8:15
voltage now we are doing two conversions
8:18
so enable the scan conversion mode set
8:21
the number of channels to two and
8:23
configure the Channel Zero I am going to
8:26
use the dma for multiple Channel
8:28
conversion
8:30
make sure the dma is in circular mode
8:32
for the continuous
8:34
conversion also enable The dma
8:36
Continuous request all right everything
8:39
is configured click save to generate the
8:42
project now the vref Cal retrieves the
8:46
calibrated data from the memory this is
8:49
mentioned in the data sheet of the
8:51
device also note that this data was
8:53
measured with vdda at 3.3 volts which is
8:58
also mentioned here
9:03
now inside the main function we will
9:05
start the ADC in dma mode to read two
9:09
channels once the conversion is finished
9:12
an interrupt will trigger and the
9:13
conversion complete call back will be
9:16
called inside this callback we will
9:18
calculate the actual reference voltage
9:21
using the converted value this formula
9:24
is defined in the reference Manual of
9:28
h750 after calculating the reference
9:30
voltage we will use it as the reference
9:33
point to calculate the ADC input voltage
9:36
all right the project builds just fine
9:39
so we will load it to the board but
9:42
before doing that let's make some
9:43
Hardware changes so that we can vary the
9:47
vdd this jumper on the nucleo board
9:50
enabled it to receive the power supply
9:52
from the SD link when this jumper is
9:55
connected the vdd will be set to 3.3
9:58
volts
10:00
I will leave the SD link connected but
10:02
remove this jumper now I am supplying
10:05
the power on the 5vt pin of the board
10:09
right now the supply voltage is set to
10:11
1.7 Vols let's try to launch the
10:16
debugger well it did not work as we know
10:18
that the vdd needs to be higher than 1.8
10:22
Vols now I am changing the supply
10:24
voltage to 2 volts
10:31
the debugger has launched
10:33
successfully let's run it now you can
10:36
see the vref is being shown 2,000
10:40
mol now I am going to vary the ADC input
10:44
voltage also keep an eye on the ADC
10:55
value now the input voltage is 1 volt
10:58
the ADC value is around half the maximum
11:02
and the voltage variable is showing
11:04
1,000
11:05
molts now the input voltage is 2 volts
11:09
same as
11:10
vdd you can see the ADC value is at
11:13
maximum
11:15
4,95 and the voltage is also around
11:18
2,000 M Vols now imagine if the battery
11:22
voltage drops to 2 volts and we do not
11:24
measure the reference voltage our
11:27
reference point is set at 3 3 Vols the
11:31
ADC will still measure 2 volts as
11:34
4,095 and our calculation will show this
11:37
as 3.3 volts input voltage now I am
11:41
increasing the supply voltage to 2.5
11:44
Vols the reference voltage is also
11:47
changed and the ADC will now measure the
11:49
input voltage against this 2.5 volt
11:53
reference therefore the ADC value has
11:56
been
11:57
reduced but because we are setting the
11:59
vref as our reference point our
12:01
calculated voltage is the same as input
12:04
voltage now we can measure the input
12:06
voltage up to 2.5 Vol this is how the
12:10
vdd affects the ADC and therefore when
12:14
using the battery to power the system
12:16
you must set up the ADC to measure the
12:19
vdd note that the method we used is to
12:22
measure the vref but since in nucleo F
12:25
446 the vref is connected to vdd we are
12:28
getting the measurements for vdd
12:31
itself now we will do the same in f103
12:35
C8 blue pill let's open the manual and
12:39
data sheet of this
12:41
MCU let's start with the data sheet and
12:44
search for the vref
12:50
plus here you can see the v+ pin is
12:53
available in a 100 pins package but it
12:56
is not available in 64 pins
12:59
it must be connected to the
13:02
vdda it is also not available in a 48
13:05
pins package and must be connected to
13:08
the
13:09
vdda if you do have a separate vref plus
13:12
pin available on the board it must have
13:14
a voltage between 2.4 volts and
13:18
vdda the vdda also varies between 2.4
13:22
volts to 3.6
13:25
Vols let's look for the V
13:27
reint here here you can see this voltage
13:30
is fixed at around 1.2 Vols but unlike F
13:34
446 this MCU does not have a calibration
13:37
data for the vref in don't worry about
13:41
it as we will get the data
13:43
ourselves here I have already created a
13:46
project for f103
13:49
C8 let's check the cube MX configuration
13:54
once also note that the sampling time
13:57
for the internal reference Channel must
13:59
be between 5 to 17
14:01
micros here I have enabled the vence
14:05
channel in the
14:06
adc1 the channel sampling time and ADC
14:09
clock is set so that we get the
14:11
conversion time between the specified
14:14
limits in the main code we will simply
14:16
read the ADC value for the internal
14:19
reference channel the ball is powered
14:22
with 3.3 volts right now and we got the
14:25
ADC value 1,530
14:29
make sure to call the calibration
14:31
function once before starting the
14:33
ADC now we will use this
14:37
1,530 as a calibrated value for the
14:39
internal reference
14:41
voltage finally calculate the vref using
14:44
the calibrated value we just defined the
14:48
calibrated value we calculated was using
14:50
3.3 Vols vdd hence the
14:54
3,300 to provide the variable power
14:57
supply we need to remove the 3.3v Supply
15:00
from the SD link and then connect the
15:03
external power supply to the 5vs pin of
15:05
the
15:06
board right now the supply voltage is
15:08
set to 2.5
15:11
volts let's debug this
15:13
project you can see the vref is around
15:17
2,400
15:19
Ms now I am increasing the supply to
15:22
around 2.8
15:24
Vols you can see the changes in the
15:26
debugger as well when the battery
15:29
voltage drops the vdd will also drop and
15:32
so does the
15:34
vref as long as the vref is above 2
15:36
volts things will work just fine we can
15:40
use this measured vref to calculate the
15:43
ADC input
15:44
voltage so we saw the two MCU so far in
15:49
both of them the vref pin was connected
15:52
to the vdda which was then connected to
15:55
the
15:56
vdd hence we could not have a separate
15:59
reference and Supply
16:04
voltages if you take a look at the
16:06
schematic of the
16:07
h74 discovery board here you can see the
16:10
vrf plus pin is separate from the
16:14
vdda but there is a z Ohm resistor
16:17
connecting both of them which is then
16:19
connected to the vdd of the
16:22
MCU so by default the vref of the board
16:25
is connected to the
16:26
vdd if we remove this are 66 the vref
16:30
pin will be completely independent and
16:33
we can provide a separate reference
16:34
voltage for the ADC while the MCU is
16:37
still running at
16:39
vdd but removing a 66 alone will not be
16:43
enough on this
16:44
board here you can see the physical vref
16:47
pin is not connected to the mcu's vref
16:50
pin so we need to also close this s sp20
16:54
connection to connect them both once
16:57
both the changes are made made we can
16:59
provide the external reference voltage
17:01
for the
17:02
ADC now I did not do it on this board as
17:06
this is very
17:07
expensive but I did something similar on
17:10
the
17:10
h750 custom Dev
17:13
board here you can see the schematic of
17:16
this board the vref pin is connected to
17:19
the 3.3 volts via this Z Ohm resistor
17:24
R11 I removed this resistor and
17:27
therefore the vref becomes open
17:30
we can then connect the external
17:32
reference voltage on this pin also note
17:35
that
17:36
vdda is a separate pin which is
17:38
connected to 3.3 Vols via the
17:42
R34 let's take a look at the data sheet
17:44
of this
17:45
h750
17:47
MCU we will again look for vref
17:56
plus here you can see the range for V
17:59
ref plus is between 2 volts to
18:02
vdda we should keep this in mind when
18:04
providing external reference voltage for
18:07
the ADC if you want a lower reference
18:10
disconnect the vdda from 3.3 Vols and
18:14
provide external voltage for the vdda as
18:17
well now we will look for the V
18:20
refin here we have a typical 1. 216
18:24
Volts for the internal reference voltage
18:27
and there is calibration data for the
18:29
vref stored in the memory as well all
18:33
right I have already created a base
18:35
project for
18:37
h75 let's configure the adc1 channel 3
18:40
in single-ended mode this is where we
18:43
will measure the ADC input voltage let
18:47
me first fix the ADC clock issue here
18:51
the ADC is clocked at 75 MHz right now
18:55
let's use a hypr scaler so that the
18:57
measurement will be slow
18:59
I am also enabling the dma in the
19:02
circular mode so the conversion and
19:04
transfer will take place using the dma
19:07
let's set a high sampling time for this
19:10
channel so that we do not interrupt very
19:15
often the internal reference channel is
19:18
in adc3 so we will enable it there let's
19:22
configure this channel so that we get
19:24
the sampling time higher than 4 micros
19:26
seconds as specified in the the data
19:29
sheet we will read this channel in the
19:31
blocking mode so no interrupt or dma is
19:35
needed or right that is all click save
19:38
to generate the project let's define an
19:41
array to store two ADC values we will
19:45
store the calculated vref here and the
19:48
input voltage here now let's fetch the
19:51
calibrated VF data from the memory
20:01
now inside the while loop we will
20:03
convert the V reint channel of the
20:05
adc3 I am storing the value in the first
20:09
element of the array inside the main
20:11
function start the adc1 in the dmma mode
20:16
we will read the input voltage here and
20:18
the ADC value will be stored in the
20:20
zeroth element of the array once the dma
20:24
finishes the conversion we will simply
20:26
set this variable to one now inside the
20:29
while loop first calculate the vref
20:32
voltage using the calibrated data and
20:34
the ADC value of the internal Channel if
20:38
the variable is done is setor one we
20:41
will use this vref as the reference
20:43
point to calculate the actual input
20:46
voltage that is all let's build and
20:49
debug this project this is the
20:52
connection for this board the board is
20:55
powered with 3.3 volts from the SD link
20:58
itself self therefore the vdd is fixed
21:01
at 3.3 Vol although I am providing a
21:05
separate power supply to the vref plus
21:08
pin let me adjust it to 2 volts the
21:12
active Pro will be used to provide a
21:14
variable input voltage to the ADC input
21:18
let's run the debugger now you can see
21:21
the vref is at 200
21:23
Ms keep in mind that vref is a separate
21:26
pin here hence the vdd is not being
21:29
changed it is still at 3.3
21:33
Vol now I will vary the input voltage to
21:36
the ADC you can see the voltage value is
21:40
updating according to the input voltage
21:43
also keep an eye on the ADC value at the
21:46
zeroth element this is the value as per
21:49
the input voltage you can see that at 2
21:52
volts we have reached the full
21:55
resolution this is the advantage of
21:57
using an external reference voltage say
22:01
for example if the sensor outputs the
22:03
voltage between 0 to 2 volts we can use
22:07
the external reference voltage of 2
22:09
volts to get the full scale resolution
22:12
of 16 bits you can see at 0 Vols we are
22:16
getting the value around 1,000 whereas
22:19
at 2 Vols the value is around maximum
22:24
65,535 if you do not want to provide an
22:27
external Supply on the vref pin there is
22:30
one more way to generate a fixed
22:31
reference voltage some of the SDM 32
22:35
devices are provided with the vref buff
22:38
peripheral it is used to set a
22:40
predefined reference voltage on the vref
22:43
pin we can enable the internal voltage
22:46
reference here you can see the pin V re+
22:50
is now configured as vref buffout pin
22:53
you can even connect it to the sensor's
22:55
VCC to power the sensor but it is
22:58
capable of providing a very small
23:00
current somewhat around 4
23:02
milliamps we have only a few sets of
23:05
voltages available here so I am going to
23:07
set it at 1.5 Vols all right let's
23:11
generate the project again although we
23:14
do not need to measure the vref now but
23:16
I will keep the code same so that we can
23:19
see if the vref voltage is generated as
23:21
per the
23:23
configuration let's debug the
23:25
project I have removed the external
23:28
Supply on the VF pin and the 1,500 MTS
23:32
you are seeing is generated
23:34
internally let's vary the input
23:37
voltage you can see that the ADC value
23:40
has reached maximum of 1.5 volts now so
23:45
we are getting a full scale resolution
23:47
at 1.5
23:49
volts but still the vref is not exactly
23:52
1,500
23:54
M let's do the calibration for adc3 once
23:59
let's call the calibration function
24:01
inside the main function the calibration
24:05
mode is set to linear calibration offset
24:07
and the channel is configured in
24:09
single-ended
24:12
mode all right let's build and debug it
24:16
again now you can see we are getting the
24:19
reference voltage of
24:20
1,500
24:22
Ms actually the calibration is required
24:25
for measurement not the generation so
24:28
even if it is not calibrated the voltage
24:31
generated is still 1.5 Vols the arrow
24:35
was simply there in the measurement of
24:37
the
24:38
vref like I said earlier since we are
24:41
generating it internally we do not need
24:43
to measure it so you saw how we can use
24:46
the external reference voltage to reduce
24:48
the reference point for the ADC input
24:51
voltage this can help us get the maximum
24:54
resolution even at the low
24:56
voltages also for the devices where a
24:59
separate vref pin is not available we
25:02
can reduce the vdd itself so I hope you
25:06
understood the reference voltages used
25:08
in the ADC peripheral of SDM
25:11
32 this is it for the video you can
25:14
download the project from the link in
25:16
the description leave comments in case
25:19
of any doubt keep watching and have a
25:22
nice day ahead
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